This invention relates to a semiconductor device and a method for manufacturing the device, and more particularly to a semiconductor device used as wiring or a stacked capacitor.
Semiconductor devices used as wiring or stacked capacitors have been being developed. To form such wiring or the lower electrode of a capacitor, for example, an interlayer insulating film 6 having an opening 4 is formed on a conductor 2, and a conductor 8 which will serve as wiring or the lower electrode of the capacitor is deposited on the resultant structure, as is shown in FIG. 1. Thereafter, a resist pattern 10 is formed on the conductor 8. Using the resist pattern 10 as a mask, the conductor 8 is etched.
During the manufacture of the semiconductor device of the FIG. 1 structure, it is possible that the pattern 8 will not be aligned with the interlayer insulating film 6 because of the opening 4 as shown in FIG. 2. In light of this, a margin for compensating such a misalignment is required, which inevitably degrades the precision of the film forming process.
Moreover, to form a highly integrated structure in which wiring layers or capacitors are formed very closely as, in particular, in the case of a memory cell, the distance between the lower electrodes 8a and 8b of the adjacent wiring layers or capacitors cannot be reduced to a value lower than the minimum value (=x in the FIG. 3 case) which is achieved in lithography.
In addition, the use of lithography inevitably increases the process steps.